1. Technical Field
The present invention relates to a semiconductor device.
2. Related Art
The major portion of power consumption in a MISFET (metal insulator semiconductor field effect transistor) is caused by the contact resistance between a source/drain and a metal. This is because a Schottky barrier is formed at the interface between the semiconductor and the metal, and the barrier becomes electric resistance. In recent years, the contact resistance accounts for a large proportion of the power consumption by a MISFET, and a decrease of the contact resistance is required.
To solve this problem, a thin insulating film of 2 nm or less made of silicon nitride, silicon oxide, silicon oxynitride, HfO, HfSiO, HfSiON, or the like is inserted to the interface between a Si substrate and the metal formed on the Si substrate, so that the interaction between the Si and the metal is reduced, thereby the Schottky barrier being lowered (see JP-A 2006-100387 (KOKAI), for example). In such a case, the resistance generated by the Schottky barrier becomes lower, but carriers tunnel through the thin insulating film. As a result, the tunnel barrier becomes new resistance.
Even though the pinning by MIGS (metal induced gap states) is eliminated by the thin insulating film at the interface, the new resistance generated by the tunnel barrier is added, and because of that, realization of low contact resistance is restricted. Furthermore, since the work function of a metal is determined by the type of the metal, the work function cannot be flexibly controlled.
Likewise, a thin insulating film such as a germanium oxide film of 0.6 nm in thickness or an aluminum oxide film of 2.2 nm in thickness is inserted to the interface between a Ge substrate and the metal formed above the Ge substrate, so that the interaction between the Ge and the metal is reduced, the Schottky barrier being lowered (as disclosed by T. Nishimura et al., in “Ext. Abst. International symposium on control of semiconductor interface (p.p. 67-68), 2007”, for example). By virtue of this thin insulating film, the position of the pinning by the MIGS (metal induced gap states) is successfully changed. However, the effective work function is adjusted only to 4.2 eV, as opposed to the target value of 4.0 eV. In this case, the resistance generated by the Schottky barrier becomes lower, but carrier electrons tunnel through the thin insulating film. As a result, the tunnel barrier forms new resistance. By the technique disclosed by T. Nishimura et al., in “Ext. Abst. International symposium on control of semiconductor interface (p.p. 67-68), 2007”, the position of pinning can be changed, but the work function cannot be flexibly controlled. As a result, an optimum work function cannot be achieved. Furthermore, although the Schottky barrier is lowered, the resistance due to the tunnel barrier is added. Therefore, there is a limit to realization of low contact resistance.
As described above, by the conventional techniques, the Schottky barrier is lowered by inserting a thin insulating film to the interface between a semiconductor and a metal. However, a high tunnel barrier is newly formed at the interface. This can be classified into the following two problems.
The first problem is that the junction effect between a semiconductor and a metal cannot be completely eliminated, and the position of pinning shifts. In such a case, the position of pinning does not necessarily shift toward the position of an optimum work function. For example, as disclosed in JP-A 2006-100387 (KOKAI), an effective work function of approximately 4.2 eV is obtained in a case where an oxide film is inserted to the interface between an n-type Ge and a metal. The effective work function should ideally be 4.0 eV or less, or even as small as 3.9 eV or less. However, the effective work function is fixed to 4.2 eV by this method. This value cannot be significantly changed, even if the film thickness of the oxide film to be inserted is changed, or the metal is changed. Therefore, there are no measures for improvement.
The second problem is that electrons need to tunnel through an inserted insulating thin film to let current flow. The tunnel barrier newly generates high resistance, and as a result, the power consumption becomes larger. If the insulating thin film is made too thin, the effect of shifting the position of pinning becomes smaller.
To sum up, in semiconductor devices of the next and later generations such as MOSFETs with lower power consumption, a new technique is required to optimize the effective work function and suppress generation of new resistance as far as possible.